Accessing the C64 memory between 65xx chips operations.

From: tokafondo <tokafondo_at_gmail.com>
Date: Sun, 19 Apr 2020 08:52:25 -0500 (CDT)
Message-ID: <1587304345129-0.post_at_n4.nabble.com>
<http://cbm-hackers.2304266.n4.nabble.com/file/t374905/Captura_de_pantalla_de_2020-04-19_14-42-34.png> 

This is a timing I've though of the memory accesses the 65xx chips does
during a 1Mhz cycle.

After posting in other places, it seems that the actual /free/ time the
memory is *not* accessed is not /always/ the same.

So I'm thinking that after pinning in a logic analyzer with high resolution
and large logging capabilities, /holes/ in the timing could be found so an
external /third player/ could be fit to make it access the memory with no
intervention of the VIC or the CPU -- talking about the C64 here.

That would open the posibility of a /dual core/ C64, where an external CPU
could do things /a/side or /be/sides the main one, like drawing graphics
while the 6510 is doing other things, or making fast calculations.

Having the dot clock output pin in the expansion port would do things
easier, as everything would be clocked at the same speed the VIC is ticking.

Comments, corrections and discussions are not only welcome but encouraged.

Thanks.

--

Saludos y cerveza.



--
Sent from: http://cbm-hackers.2304266.n4.nabble.com/
Received on 2020-05-30 01:26:30

Archive generated by hypermail 2.3.0.