6510 I/O port as chip selects to expand memory

From: Claudio Sánchez <tokafondo_at_gmail.com>
Date: Wed, 17 Nov 2021 23:01:56 +0000
Message-ID: <f958364f-3a6c-cd82-1860-4f824c25a19c_at_gmail.com> 
 From 6510 datasheet, description section.

"An 8-bit Bi-Directional I/O Port is located on-chip with the Output Register at Address 0001 and the Data-Direction  Register at Address  0000. The  I/O  Port is  bit-by-bit programmable"

Let's forget about the C64, because it has a PLA that has its own behaviour.

Can this I/O port be used in a new design as chip select for memory banking?
Received on 2021-11-18 03:00:03

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