Re: 6510 I/O port as chip selects to expand memory

From: David Wood <jbevren_at_gmail.com>
Date: Wed, 17 Nov 2021 20:55:04 -0500
Message-ID: <CAAuJwiqyB1Jcg_CbeHv=HupY2ppy+Sd3AHG-WROKN3TCZhN5OA_at_mail.gmail.com>
Yes.  In fact this is how the I/O port is used in the c64 for the
largest part.  The PLA just helps while the I/O port controls the
memory banks between ram, rom, and the c64 chips.

On Wed, Nov 17, 2021 at 8:02 PM Claudio Sánchez <tokafondo_at_gmail.com> wrote:
>
>  From 6510 datasheet, description section.
>
> "An 8-bit Bi-Directional I/O Port is located on-chip with the Output Register at Address 0001 and the Data-Direction  Register at Address  0000. The  I/O  Port is  bit-by-bit programmable"
>
> Let's forget about the C64, because it has a PLA that has its own behaviour.
>
> Can this I/O port be used in a new design as chip select for memory banking?
>
Received on 2021-11-18 07:00:03

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