El 18/11/2021 a las 21:48, Jim Brain escribió: > On 11/18/2021 12:59 PM, Claudio Sánchez wrote: >>> >> >> Why didn't you added lines 6 and 7? It wouldn't had hurt... > > Because the goal of the project was the emulate the 6510. If you want 6/7, you can simply tweak the Verilog and put two extra pads on the design. Ok, understood then. Thanks. > > Jim >Received on 2021-11-19 00:00:03
Archive generated by hypermail 2.3.0.