From: Hársfalvi Levente (hlpublic_at_freestart.hu)
Date: 2004-11-03 22:34:12
Hi Jim!,
> The plan:
> Set timer1 to Normal (non-PWM) mode, (output disabled), then let the timer
> run at CLK speed.
> bring pins high or HiZ
> When falling edge on POT happens, AVR will latch timer1 and generate IRQ
> In ISR, read ICP match. Add 8(256 + x) and store in OCR1A, 8(256+ y) to
> OCR1B. Set both pins low and turn on toggle on match output mode
> do other work
>
> The problem I see with this:
>
> If the next IRQ does not happen before the timer makes a full run around
> (say the application switches to the other joyport, which means I get
> disconnected from SID), the pins will toggle low again, and I may miss an
> IRQ (I cannot detect the IRQ while the pins are low.)
>
> To get around this, I thought about enabling the OCR IRQs. When they are
> triggered, depending on which (x or y) is bigger, turn on the overflow
> IRQ. In the overflow IRQ, set pins to high and turn off toggle on match
> mode.
Yep, or the toggle feature could be enabled in the ICR interrupt
routine.. and then disabled by the OCR IRQ.
> I *think* that may work, but I'm going to save my current code, which is a
> lot simpler.
Definitely... ;-)))
> If this works, and I can use the ICP IRQ as my trigger IRQ, then I might
> be able to go back to using the Tiny28, which was my original target.
> That part is smaller, cheaper, and seems a good fit for this use. The
> Mega8 is oversize, but I needed the SPI, given that my bit-bang SPI-like
> solution was stopping when the POT code was running. It also means I'd
> have a rock-stable POT emulation, which would be nice.
Yep, and if a "regular" series resistor is used (say, can't generate
values of 0...5 or so but who cares =) ) none of the interrupts need to
be "cycle exact" in the true sense of the word. Back then, if I only had
an AVR with two compare registers and outputs, hah! =-)))
L.
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