Re: VHDL description of the REC

From: Konrad Burylo (
Date: 2001-09-20 23:06:13

----- Original Message -----
From: "Rainer Buchty" <>
To: <>
Sent: Thursday, September 20, 2001 5:58 PM
Subject: Re: VHDL description of the REC

> I need to stick to one PLD language and not switching between VHDL, Palasm
> and ABEL all the time.
> Rainer

And what about Altera-HDL (from Max+Plus) and Verilog ?  :)
BTW - Xilinx released something interesting - Java HDL compiler, also
written in Java. Pentium VII required :)


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