Re: Jeri board and extra things

From: Professor Dredd (
Date: 2001-05-02 15:53:37

Okay Ruud,

--- Ruud Baltissen <> wrote:
> If one can reprogram his PC's FLASH-BIOS, it cannot
> be so difficult to add
> this feature to our new design as well.
> On the other hand I like the suggested idea of
> loading the KERNAL in SRAM
> but not from EPROM but from disk like an OS. Even a
> combination should be
> possible.

He're what I had in mind. At power up the entire
KERNAL is copied from a ROM into RAM. Then patches are
loaded from a special RAM area that is not part of the
main map and is not succeptible to power loss.

The special RAM should be outside the main memory map
in the same way C-128 VDC RAM is. It could be made
"power-safe" a number of ways like (just off the top
of my head":
battery-backup like in Apple IIgs
NOVRAM like in modems
FlashROM like in PC BIOS

That is what I mean by PRAM and I am not sure what
technology would be best suited for such a design.
Whatever technology is used, here is the type of thing
the PRAM will be used for:
custom key matrix
system clock
user customizeable KERNAL patches

Another good thing to put there would be system I/O
configurations defaults. For instance, what if you
want to address a second SID chip at $DE00, but you
already have Turbo 232 registers mapped there? Suppose
you could map them both there and select between the
two with a softswitch? Then, you'll need someplace to
store your user-defined default configuration so the
KERNAL can set the softswitches on powerup.

Just an idea. I have no clue how it might be done.

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