It might be a misunderstanding, but the last you mentioned about timing implies it was cycle accurate. "Remark #2: Analyzing "ORA ($12,X)" I found out that the 6502 first reads a byte from ($12) while in the mean time adds X to $12. It looks that the 6502 indeed uses the ALU. OTOH this means that the TTL6502 can be faster. But to remain compatible I maybe have to add one or more dummy cycles." I hadn't noticed http://www.baltissen.org/newhtm/mini6502.htm before, which you say uses the same dummy cycles as the 6502 due to it using the ALU in a similar way to the 6502. I haven't found any documentation on how you deal with undocumented opcodes, so I assumed (maybe incorrectly) that you didn't support them. Do you pass all http://visual6502.org/wiki/index.php?title=6502TestPrograms ? On 30/05/2016 08:00, Baltissen, GJPAA (Ruud) wrote: >> Its not quite as accurate though. >> http://www.baltissen.org/newhtm/ttl6502.htm > And what is not accurate, if I may ask? IMHO the schematics cover every possible aspect of the 6502. But if I'm wrong, please tell so I can correct the error(s). > Message was sent through the cbm-hackers mailing listReceived on 2016-05-30 14:00:02
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