Re: CPLDs/FPGAs toolchain

From: silverdr_at_wfmh.org.pl
Date: Sun, 24 Apr 2016 03:27:36 +0200
Message-Id: <49EBAB1B-31FF-484C-8C3F-530C7C7C3F8C@wfmh.org.pl>
> On 2016-04-24, at 01:42, Mark McDougall <msmcdoug@iinet.net.au> wrote:
> 
>> Oh, and a small note about the language choice: VHDL is obviously
>> superior to Verilog.
> 
> In the same way Christianity is obviously superior to any other religion. Fell free to discuss further.

He put a disclaimer that those are his personal opinions. As for me - I read the descriptions and comparisons, look at the examples in both languages and the only advantage of Verilog I notice is a more familiar syntax. But I - personally - don't find it to be a real advantage. In any case - whether it's vim or emacs :-) - personal taste most probably.

-- 
SD!


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