Re: CPLDs/FPGAs toolchain

From: Mark McDougall <*msmcdoug_at_iinet.net.au*> Date: Sun, 24 Apr 2016 09:42:11 +1000 Message-ID: <571C0853.4040005@iinet.net.au> · msmcdoug_at_iinet.net.au

On 23/04/2016 4:26 AM, Ingo Korb wrote:

> I don't have that much experience with Altera Quartus as I have with
> ISE, but it seems to suck less than ISE in some regards (less crashes)
> but more in others (no pre-inizialized inferred RAM, no command line
> data2mem-like utility).

Incorrect on both points.

> Oh, and a small note about the language choice: VHDL is obviously
> superior to Verilog.

In the same way Christianity is obviously superior to any other 
religion. Fell free to discuss further.

Regards,

-- 
|              Mark McDougall              | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug> |   with less resistance!"

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