Re: The ultimate UltiMax cartridge

From: Michał Pleban <>
Date: Tue, 22 Oct 2013 18:45:27 +0200
Message-ID: <>

Gerrit Heitsch wrote:

> What's the latency in the _CS signal? The delay from the PLA and all the
> gates works the other way too, meaning even though the CPU is done and
> VIC has taken over the bus with AEC, the _CS signal will still be low
> for a time. Doesn't matter with a ROM, but with a RAM that can corrupt a
> write cycle.
> There is a reason why all simple 6502 systems I have seen (that includes
> the 1541) gate R/_W with PHI2 when talking to a SRAM.

I disassembled the MAX BASIC cartridge and the R/_W signal goes directly
to the SRAM without any gates. So hopefully this will work.


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Received on 2013-10-22 17:01:39

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