RE: Help with GAL needed

Hallo Michal, 


> But what you have written is not a flip-flop. It's
> purely a combinatorial device. 

Please have a look at this:


/* Define Input Pin(s) */
	pin 2 = IN1A;
	pin 3 = IN1B;
	pin 4 = IN2A;
	pin 5 = IN2B; 

/* Define Output Pin(s) */
	pin 12 = OUT1;
	pin 13 = OUT2; 

 /* Boolean Equations (Using CUPL Notation) */
	OUT1 = !(IN1A & IN1B);
	OUT2 = !(IN2A & IN2B);


I just programmed two NAND gates. Now connect pin 19 with pin 4 and pin 18 with pin 3 and we have a fliflop IMHO. Or am I wrong?

Now replace the external connections with internal ones:

	OUT1 = !(IN1A & OUT2);
	OUT2 = !(IN2B & OUT1);

And this is what I did in my project IMHO. The only thing I have to do now is to program a GAL accordingly and see what a real life test brings.


> To use flip-flops, you need to use the .D construct. ...
> CLK at pin 1 is needed every time you use flip-flops. It
> is a common clock signal for all D flip-flops in the chip.

As you say: "_IN_ the chip". And as I don't use the .D construct, I don't use these internal FFs (AFAIK).


And here I wanted to bring up another problem. For another project I tried to use a part of a GAL as counter and CUPL didn't accept the .D construction. But checking things again, I found out that the example, that I used as base, used G16V8 as device. I used G16V8AS which means that it should be treated as "simple" device. IMHO: no flipflops. Using G16V8 as well, my project compiled fine.
But this also strengthens my opinion that the design in the previous email doesn't (and cannot) use internal FFs.

As you can see, I disagree with your conclusion but still thank you for your input because I still learned from it!


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