Re: Help with GAL needed

From: Michał Pleban <>
Date: Thu, 18 Apr 2013 12:22:58 +0200
Message-ID: <>

Baltissen, GJPAA (Ruud) wrote:

> CUPL compiled without any problem. But does it mean the above is good? I know it can be optimised/simplified, but as you can see the equations are a literally translation of the hardware. One part can be replaced by a single OR gate but then I would need at least three ICs in real life, now only two.

Generally CUPL will minimize your functions to adapt them best for the
target architecture (GAL in this case). So it does not matter that much
how you write them.

> As you can see I reserved output pins for the flipflop. IMHO it cannot be done in another way. But I hope to be wrong in this case; the less output pins I need, the better.

FF1 and FF2 are used both as inputs and outputs, which is what is needed
with the GAL architecture. GAL does not have "internal" registers so
this is what you need to do.

But what you have written is not a flip-flop. It's purely a
combinatorial device. To use flip-flops, you need to use the .D construct.

> Then there is the CLK input at pin 1. IMHO you only need it if you program (a part of) the GAL as counter. I know I haven't used any of the internal registers, but I don't know what CUPL made of it. So I'm not sure yet if it is needed.

CLK at pin 1 is needed every time you use flip-flops. It is a common
clock signal for all D flip-flops in the chip.


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Received on 2013-04-18 11:00:04

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