Re: Cassette Sense on Plus/4

From: Rob Clarke <>
Date: Wed, 25 Jan 2012 15:47:39 +0100
Message-ID: <>
> the C116 prototype shown there doesn't have the PLA and therefore has no
> decoding logic for any I/O-devices (it also lacks the banking logic). So
> the only built in I/O was the port in the CPU which had to handle
> everything.

Yes, I had forgotten that.

> As you pointed out, using P7 would disrupt the IEC bus if you pressed
> PLAY on the datasette during data transfer. I assume that's the reason
> it was changed later when the PLA was added. I don't have a ROM listing
> of the 264 ROMs, but I'd be surprised if the -04 and -05 KERNAL-ROMs
> would still be able to use CPU-P7 for the tape sense.

Having tested it on a +4 where I moved the jumper to J9, the cassette does
not then work on an -05 kernal. I have a huge excel spreadsheet with *all*
the known kernal ROMS dumped into it. It's all in hex and not a
dissassembly but it does highlight the differences between adjacent ROM's.
If I look at the differences between 05 and 01, I am not even sure the 01
kernal supported it, the differences do not seem to related to handling

I seems peculiar that the +4 board is the only board to have the jumpers
when it was one of the later evolutions from the original 9-IC TED.


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Received on 2012-01-25 15:00:39

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