On 01/25/2012 03:47 PM, Rob Clarke wrote: > >> As you pointed out, using P7 would disrupt the IEC bus if you pressed >> PLAY on the datasette during data transfer. I assume that's the reason >> it was changed later when the PLA was added. I don't have a ROM listing >> of the 264 ROMs, but I'd be surprised if the -04 and -05 KERNAL-ROMs >> would still be able to use CPU-P7 for the tape sense. > > Having tested it on a +4 where I moved the jumper to J9, the cassette does > not then work on an -05 kernal. I have a huge excel spreadsheet with *all* > the known kernal ROMS dumped into it. It's all in hex and not a > dissassembly but it does highlight the differences between adjacent ROM's. > If I look at the differences between 05 and 01, I am not even sure the 01 > kernal supported it, the differences do not seem to related to handling > $01. > > I seems peculiar that the +4 board is the only board to have the jumpers > when it was one of the later evolutions from the original 9-IC TED. The question is, what was the sequence in the 264 development? I think the C16 was the last one. I wouldn't surprise me if the layout of the +4 board was done while the change to the PLA and extra logic was relatively recent and they wanted to keep their options open. BTW: The C16 board also has 2 unexplained jumper blocks on the board next to U11 (74LS125) labeled D1 and D2. They are not mentioned in the schematics. Anyone have an idea what they are for? Gerrit Message was sent through the cbm-hackers mailing listReceived on 2012-01-25 18:00:28
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