Re: Cassette Sense on Plus/4

From: Gerrit Heitsch <>
Date: Tue, 24 Jan 2012 17:58:14 +0100
Message-ID: <>
On 01/24/2012 10:40 AM, Rob Clarke wrote:
> Hi all,
> I have just built a diagnostic harness for the Plus/4, C16 and other TED
> based machines. Partly because I needed one and partly just to see if I
> could.
> As part of the test suite I check the operation of all the cassette lines
> using a loopback connector. (You can find the whole thing documented here
> : )
> One of the things that has mystified me somewhat is the cassette sense. On
> a C16/C116/C232 the sense is linked to the input of a buffer/driver which
> is in turn enabled by access to the address range $FD10 - $FD1F, the
> output being fed into D2.
> In a Plus/4 the 6529 on the user port sits in this address range and
> although the sense line is still routed into P2 (by J8), pressing play on
> the cassette would obviously have disrupted any activity on the user port.
> To work around this, there is the option on the board (J9) to instead
> route cassette sense to P7 of the CPU I/O port, which is normally used for
> the serial port DATA IN line, so any serial communication would have been
> equally screwed up.

As far as I can deduce from what I know about the history of the 264, 
using P7 of the CPU for tape sense was the original design of the C116. 
C16 and Plus/4 came later.

As you can see in

the C116 prototype shown there doesn't have the PLA and therefore has no 
decoding logic for any I/O-devices (it also lacks the banking logic). So 
the only built in I/O was the port in the CPU which had to handle 
everything. Remember, it was supposed to go against the ZX spectrum an 
compared to that, it had plenty of I/O...

As you pointed out, using P7 would disrupt the IEC bus if you pressed 
PLAY on the datasette during data transfer. I assume that's the reason 
it was changed later when the PLA was added. I don't have a ROM listing 
of the 264 ROMs, but I'd be surprised if the -04 and -05 KERNAL-ROMs 
would still be able to use CPU-P7 for the tape sense.

It also does annoy me that on the Plus/4 tape sense disrupts the user 
port, but if you need more I/O, you could use Pin 18 (F0) of the PLA as 
a chip select for a 6522A or similiar. It should appear in $FD2x. I 
think that space was supposed to be used for the speech synthesizer.


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Received on 2012-01-24 17:00:03

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