ncoplin_at_orbeng.com
Date: 2004-02-06 09:24:59
Hi All,
I'm familiar with the concept of clock stretching, but struggling with the
implementation....
>>Background:
All the IO chips in a C64 are 1MHz rated, even mostly so for the C128. If
one was to have a faster processor (or external access from say a PC), then
any read/writes to these locations would have to be done at 1MHz still.
>>Problem:
Obviously a read/write to the I/O area can be detected (off one of the 74139
chips or the PLA) but if the clock cycle is not aligned with the edge of the
system clock (Phi2) then any stretching will not only get you as far as the
time remaining. For example if you are already 200ns into the Phi2 high,
then the most you can stretch the clock is the remaining 300ns.
Is the only way to do this properly to:
1) hold the process off for the current (incomplete) cycle
2) do the action on the next clock cycle where you will have the whole phase
available?
I must admit I've never properly understood what the C128 manual says about
how it was done on that machine.
Any suggestions?
- Nick
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