Re: VIC 26 Lines Bug - Truth or Legend ?

From: Marko Mäkelä (
Date: 2001-08-21 08:45:23

On Mon, 20 Aug 2001, Martijn van Buul wrote:

> It's not those 4% extra fetches that might be the issue, it's the way the
> VIC is fooled into doing them. One thing *is* clear, and that's that this
> effect isn't very stable. Often, it just crashes, because the memory isn't
> refreshed as it should anymore.

I don't think it is the memory refresh.  I had long discussions with
Andreas Boose when he made some $d011 experiments in 1995 or 1996, and one
thing I remember is that under some circumstances, some revisions of the
VIC-II chip may alter the address lines (or assert RAS or CAS) at the
wrong moment.  When the R/-W line is low at the same time, this would
alter the memory contents in seemingly random locations.  This effect may
well depend on the exact values of the parasitic capacitances on the bus,
just like the "$de00 compatibility" feature does.


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