Hello Ruud,
>> No, but with underclocking. The 6502 runs at 500 KHz but dies at 250 KHz.
>> What is the explanation? The Z80 for example can be clocked by hand if
>> needed. And I don't expect a DRAM-like register set inside the 6502.
>I believe an data sheet states that the 6502 uses a dynamic design,
whatever
>this means... I always thought that this means that you cannot underclock
>it...
Could the two-phase clock be what makes it an efficient design, but if the
internal delays for each micro-op is generated by an RC circuit then things
fall over... Only a hypothesis, but I agree with Ruud I can't see them
having used a transistor-capacitor memory cell instead of a true flip-flop
for their registers /latches?
- Nick
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