Hello all. I did some experiments last night with the VIC-IIe TEST bit so
I thought I'd document them here. Nothing astounding; just an attempt to
emulate the NTSC standard (60Hz PAL, if you will) as closely as possible
on a PAL C128. The timing figures are given in the text. All the usual GPL
stuff applies :)
>From Christian Bauer's article (which I am assuming holds true for the
VIC-IIe versions) the timing of borders. frame sync pulses and display
areas on the two chips are as follows:
NTSC PAL
Start top border 41 \ 16 \
End top border 50 / 10 50 / 35
Start display 51 \ 51 \
End display 250 / 200 250 / 200
Start bottom border 251 \ 251 \
End bottom border 12 / 25(24) 299 / 49
Start vblank 13 \ 300 \
End vblank 40 / 28 15 / 28
These figures assume the 25 row screen. In fact bad lines are possible
from line 48 until line 247 and video display accesses can continue as
long as line 254. These figures are the same for both PAL and NTSC
(presumably deliberately). The size of the bottom border in NTSC is 25
lines, due to the NTSC VIC-IIe having 263 lines per frame, but in the
original 6567R5 and 6567R56A this would have been 24, which makes the
derivation of the PAL version more consistent. Quite simply, when the
Commodore engineers modified the 6567 to make the 6569, they added 25
lines to the top border and 25 lines to the bottom border and altered the
line timing slightly to accomodate the slower clock.
These are the timings of the 3 official VIC-II standards, plus a fourth
which is the 6567R56A (64/262) with an exact 1MHz clock:
| # of | Cycles/ | Line | Line | Frame | Frame
Type | lines | line | frequency | period | frequency | period
---------+-------+---------+-----------+--------+-----------+--------
6567R56A | 262 | 64 |15.98011kHz|62.577us|60.992792Hz|16.395ms
6567R56A*| 262 | 64 | 15.625kHz | 64us |59.637404Hz|16.768ms
6567R8 | 263 | 65 |15.73426kHz|63.555us|59.826097Hz|16.715ms
6569 | 312 | 63 |15.63886kHz|63.943us|50.124573Hz|19.950ms
* Original 6567 timings with "intended" 1MHz clock
Compare the NTSC timings with those of a PAL C128 with 50 lines removed:
| # of | Cycles/ | Line | Line | Frame | Frame
Type | lines | line | frequency | period | frequency | period
---------+-------+---------+-----------+--------+-----------+--------
hacked | 262 | 63 |15.63886kHz|63.943us|59.690331Hz|16.753ms
In comparison with a 6567R56A, the line frequency is closer to the NTSC
spec (15.750kHz) and the frame frequency is marginally closer than a
"properly" clocked original NTSC chip. The timings of the first C64s as
released (1.02MHz clock) are way off. Thus I think this display is a
perfectly valid 60Hz PAL, NTSC-similar display. PAL CBM displays don't
like running on odd numbers of lines, hence 263 or 261 lines are not
possible. Also, the timings for 263 lines are further from the NTSC spec
than 262.
To obtain this you need to steal 25 lines from each border, and be sure of
not interfering with either vblank pulses or screen matrix display
operation. I chose line 20 to start the top border TEST routine, and keep
TEST high for 25 cycles which would make the VIC-IIe think it was on line
45 when finished. This leaves a 4 line margin between the end of the
vblank pulse and a 2 line margin between the first possible badline.
Then I chose line 260 to start the bottom border routine; at the end of 25
cycles of TEST high the VIC-IIe would think it was on line 295. This is a
4 line margin between the MSB of the line counter rolling over and a 14
line margin between the start of the vblank pulse.
NTSC PAL -> NTSC
Start top border 41 \ 16 \
Steal lines - 20<=>45
End top border 50 / 10 50 / 10
Start display 51 \ 51 \
End display 250 / 200 250 / 200
Start bottom border 251 \ 251 \
Steal lines - 260<=>285
End bottom border 12 / 25(24) 299 / 24
Start vblank 13 \ 300 \
End vblank 40 / 28 15 / 28
Although the routine I coded was a simple polled routine to run forever
and do nothing else, this is simple enough to accomplish in an interrupt
routine while still running BASIC (in 64 mode, at least). When I have some
example code for altering the BASIC interrupt vector, I'll have a go at
doing a PAL C128 "NTSC BASIC" interrupt handler. You can do useful things
during the cycle-counted TEST period, such as setting the raster interrupt
latch for the next interrupt, so the time isn't necessarily wasted.
Richard
-
This message was sent through the cbm-hackers mailing list.
To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
Archive generated by hypermail 2.1.1.