Hallo Nate, > Use bus transceivers. These are bi-directional buffers of a sort, ... You probably mean the 74LS245 or equivalent. Let's assume we use one in the databus. First question, when should it be enabled? One possible answer is: whenever IO1, IO2, ROML and ROMH are active Low. But then what about the REU? I have thought about it many times but I never realy needed it. An other important point: I had no friends to discuss it with. Now I have :) Let's do some brainstorming. I assume the critical point is buffering the data- and addressbusses and R/W. Buffering of incoming signals is not needed IMHO. Buffering of outgoing signals can be realized by a 541. We'll use 245's to buffer the addressbus. Output Enable (OE) always (L). Direction (DIR) depends on wether DMA is activated or not. We'll use 245's to buffer the databus as well. Pin 11-18 to the C64, pin 2-9 to the external world. OE should be (L) whenever: - IO1, IO2, ROML and ROMH are (L) - 6510 performs a write - DMA is activated DIR should be (H), data external -> C64, whenever: - 6510 performs READ - when during DMA external device performs WRITE (REU, C64-CP/M-cartridge) Direction of R/W depends on DMA or not. Two 125 buffers will do I think. It seems I covered everything, but I already know one situation where the interface would not work: what if somebody wants to read from hardware NOT using the I/O-lines but decoded the $DE00-$DFFF area itself? It is just a question as IMHO it would be a very unwise thing to do because of buscollisions when reading from the RAM under the I/O. Feel free to shoot on it. I also would appreciate it if you mentioned the fact you found nothing. Thanks. Groetjes, Ruud http://Ruud.C64.org - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail cbm-hackers-request@dot.tml.hut.fi.
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