Hello, * On Fri, Jun 15, 2018 at 10:52:55PM -0500 Jim Brain wrote: > On 6/15/2018 10:42 PM, Mia Magnusson wrote: > > > > Or maybe wait for a write operation, we can be sure that a write is > > data and not code, and after a write the CPU will fetch the next > > instruction (with reservation for what happens on the stack in some > > cases?). > I think all writes are safe places to interrupt the CPU (a PSH would be just > a known address sta) What about JSR (two consecutive pushes), or an IRQ, NMI or BRK (three consecutive pushes)? Regards, Spiro. -- Spiro R. Trikaliotis http://www.trikaliotis.net/Received on 2018-06-16 22:00:04
Archive generated by hypermail 2.2.0.