Re: Switchless ROMs

From: Michał Pleban <>
Date: Tue, 27 Dec 2016 20:14:45 +0100
Message-ID: <>

Gerrit Heitsch wrote:

> But since there is no RESET pin,
> any assertion of the CPU RESET pin will not phase VIC and it will
> continue with what it was doing. So there is a possibility that the CPU
> has just pulled the first byte of the RESET vector when VIC asserts RDY
> and stops the CPU for 43 cycles.

OK, this is not good, but how likely is it to happen exactly between the
fetch from $FFFC and $FFFD? I guess not very much. If the probability is
in 0.x % range, I think the user could just reset the computer again in
such unlikely case.


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Received on 2016-12-27 20:00:02

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