Re: Switchless ROMs

From: Segher Boessenkool <>
Date: Tue, 27 Dec 2016 12:38:35 -0600
Message-ID: <>
On Tue, Dec 27, 2016 at 07:25:39PM +0100, Gerrit Heitsch wrote:
> >That might be a problem. But when the computer is reset, I presume VIC
> >is is also reset to some known state?
> No... VIC (and TED by the way) has no RESET pin. Once it gets power, the 
> internal logic starts and will run until you remove power.

Yes, and the first field will be completely goofy; only after that first
field (~20ms) will everything be reset properly.

>  Are there badlines after VIC is
> >reset, or does it reset to a blank screen?
> At power on, VIC will not display anything, so I assume the default 
> state is 'display off' with background color set to black which only 
> means dummy accesses but no bad lines.

Nope, that is just luck, *usually* most registers power on as *mostly*

> But since there is no RESET pin, 
> any assertion of the CPU RESET pin will not phase VIC and it will 
> continue with what it was doing. So there is a possibility that the CPU 
> has just pulled the first byte of the RESET vector when VIC asserts RDY 
> and stops the CPU for 43 cycles.



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Received on 2016-12-27 19:01:55

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