Re: Free (as in freedom) FPGA development tools

From: Ingo Korb <>
Date: Fri, 23 Dec 2016 01:33:51 +0100
Message-ID: <> writes:

> Or any tools that would actually work and let me translate
> synthesizable VHDL designs into GAL JEDEC files.

IIRC Lattice ispLEVER Classic can do that.


       Message was sent through the cbm-hackers mailing list
Received on 2016-12-23 02:00:02

Archive generated by hypermail 2.2.0.