On 23/04/2016 7:41 AM, email@example.com wrote: > One of the n00bs question is: are the HDL designs transferrable > (capacity permitting) between FPGAs and CPLDs? And another one: are > those transferrable (when common language like Verilog or VHDL is > used) between chips from different vendors? In short, yes. If you write VHDL or Verilog, you will be able to switch between the major vendors' devices without too many issues. Where they differ is in the clocks/PLL's and the on-chip memory, and how you synthesize them. I'd suggest you look at one of the free/student versions of ModelSim if you want to avoid "vendor lock" as you put it. There were versions packed-in with older releases of Quartus, for example. IIUC there are also opensource/free version of simulators available which should be adequate for simulation. Someone mentioned these are "useless" for synthesis, but if you're only simulating they should be perfectly fine. I have several years of experience in FPGA design, in both VHDL and (some) Verilog. I can't overstate the usefulness of simulating your design, especially when starting out. One of our early clients insisted on a full simulation test-bench for a sizeable project; we actually wrote several times more code for, and spent many more hours developing the testbench than the actual target design itself, and it was an invaluable lesson. FTR having worked with Altera & Xilinx, I much prefer the former, both the devices and the tools. So much so, I actively avoid Xilinx work these days. Ughh!! I also much prefer VHDL over Verilog, despite having a software background, though I'd concede that writing testbenches is much more efficient in Verilog! Regards, -- | Mark McDougall | "Electrical Engineers do it | <http://members.iinet.net.au/~msmcdoug> | with less resistance!" Message was sent through the cbm-hackers mailing listReceived on 2016-04-23 01:00:02
Archive generated by hypermail 2.2.0.