On Tue, 5 Oct 1999, Nicolas Welte wrote: > I know. But on the C128 it's even worse than this, because clock > stretching occurs on only some I/O accesses. Isn't it only when the I/O access would happen in VIC-IIe's cycle half? I never had any difficulties with that. > So you never really know if an I/O access at 2MHz speed takes one or > two cycles. You must just know the context, that's all. And after an I/O access you will be sure that the next instruction will start on a "normal" cycle, i.e. not on the half that was stolen from the video chip. Marko - This message was sent through the cbm-hackers mailing list. To unsubscribe: echo unsubscribe | mail email@example.com.
Archive generated by hypermail 2.1.1.