Re: 264 series questions

From: Marko Mäkelä (
Date: 1999-10-05 11:34:39

On Tue, 5 Oct 1999, Nicolas Welte wrote:

> So a 'clean' double clock is not achievable because of the refresh
> cycles.

Not on the C128 either.  It'll switch the processor to single clock for
the 5 refresh cycles.  Since the TED only has 57 single cycles per line as
opposed to the 63 or 65 of the VIC-IIe, the refresh cycles are a real
nuisance when writing copper effects for double clock mode.  Levente once
sent me a nice DYCP copper scroller that had broader "pixels" (generated
by changing the background color) near the right border.

> But a clean single clock mode can be achieved by using the appropriate
> control bit. Is this correct so far?

Yes.  Nothing contradictory to my experience so far.


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