About an hour ago I found the binder that at one time held the HMOSII Design Guide. http://c128.com/hmosii My memory is HMOSII transition was 85'ish, HMOSI was 84'ish. NMOS before that, CMOS was a Pipedream about '86 on. I could check but I think the real differences were effective channel lengths and changes to the back-bias generator to create greater gate thresholds that in theory shut of the FET's faster and drew less power per FET. I am not sure if the backbias generator drew enough power itself so as to offset a lot of the savings. -----Original Message----- From: firstname.lastname@example.org [mailto:email@example.com] On Behalf Of Nate Lawson Sent: Saturday, November 23, 2013 1:28 AM To: firstname.lastname@example.org Subject: MOS fab capabilities over the years? Has anyone documented the various revisions of the MOS fab throughout the years? I'm wondering when they switched processes, scaling, CAD tools, and any use of third-party fabs for CBM designs. For example, I believe the early 90's Amiga chips were fabbed by HP or IBM, possibly. Also, were they running multiple feature sizes concurrently? Certainly there's the 6052/VIC-II/SID variations, for example. You can guess a lot of this by just looking at the chips throughout the years, but I'm looking for more detail. Thanks, Nate Message was sent through the cbm-hackers mailing list Message was sent through the cbm-hackers mailing listReceived on 2013-11-23 08:01:16
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