Being a dinosaur I keep a copy of Altera 9.2 where I can create stimulus as (scripted) waveforms. Bil >The problem with both HDLs is that they are terrible for writing testbenches. I parse the Verilog into a tree of signals then use VPI to access them from a simple C >interface. The C code can then read test vectors from files, run various events, and read out the results. >I like python more than C so I typically build a dynamic library plugin in C and then import it into python with CFFI. CFFI lets you import C files directly into python >without translating interfaces with SWIG. http://iverilog.wikia.com/wiki/Using_VPI http://eli.thegreenplace.net/2013/03/09/python-ffi-with-ctypes-and-cffi/ But this is all getting off-topic for this list. -Nate Message was sent through the cbm-hackers mailing list Message was sent through the cbm-hackers mailing listReceived on 2013-11-19 02:00:03
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