RE: FPGA/CPLD different approach

From: Bil Herd <>
Date: Wed, 4 Sep 2013 12:50:59 -0400
Message-ID: <>
I hadnít thought about  power consumption (yet)  as I guess I hadnít really
come to terms with the fact that something useful for someone restoring old
systems would really need the (exact) same footprint (TED) and reasonable
power, etc.  I was hung up all the way back at cost as I donít know what is
considered to be too expensive, but I know what I consider to be too
expensive and the different scenarios seemed kind of costly. Also  I tend
to think about its use to an engineer or for experimentation out of habit.

I assume that $100USD is completely out of line for a chip emulator just to
pick a price, I assume itís cheaper to find a system on Ebay, etc, but then
are there chips that just canít be gotten any more?  Are there systems that
are irrevocably unusable without some chips of the category we are talking


*From:* [mailto:] *On Behalf Of *didier derny
*Sent:* Wednesday, September 04, 2013 8:46 AM
*Subject:* Re: FPGA/CPLD different approach


the GODIL is thick probably too thick, but you can get one without the
connector on the top installed
it is easy to place 2 jumpers (small wires) under the board to connect GND
and VCC
(I only use the connectors on the top to connect a logic analyzer)

btw:  the 48 pin version is not really sold by trenz,  I got mine directly
from OHO,
          he sent me 2 samples (without the connectors installed)  and a
full set of connectors.

          my main problems with the GODIL was the power consumption, far
          the original circuit, (I was playing with the 6532 and micro kim)


On 04/09/2013 14:25, Istvan Hegedus wrote:


I would say if the PCB is slightly larger than the original DIP that is not
a problem although e.g. in case of the plus 4 you could not use that for
TED replacement due to the space in the shield. For me the inside is much
more important, to have as accurate emulation as possible.

The emulation could be used to build a whole system in FPGA (like FPGA64).


*From:* Bil Herd <>

*Sent:* Tuesday, September 03, 2013 3:15 PM


*Subject:* RE: FPGA/CPLD different approach

I did a quick fitting on some opencores and found that the PIOís and
support chips probably fir in the CPLDís and that the processors probably

I have a question for anyone that is interested in using FPGA/CPLD emulated
parts: How important is it that the PCB of a drop in replacement stay
strictly in the foot print of a 40/48 pin chip or is the PCB okay to be
wider than .6Ē once its .3-.4Ē above the socket itís inserted into?


*From:* [mailto:] *On Behalf Of *Ed Spittles
*Sent:* Tuesday, August 27, 2013 4:13 PM
*Subject:* Re: FPGA/CPLD different approach

For some purposes OHO's GOP board might be a better fit than the GODIL -
it's smaller, got fewer pins, but has a 512kByte SRAM on board..

(For simple designs there are CPLD variations, but as noted that's not big
enough for a 6502-like CPU, or for ROM or RAM.)

As noted elsewhere, these boards have 5V level converters, crystals, and
on-board EEPROM for configuration.



On 27 August 2013 11:34, Ingo Korb <> wrote:

Bil Herd <> writes:

> I have gone through some test fitting but haven't really checked out
> GODIL, for instance can they program the VCC and Ground pins or do
> they have to physically configure?

They can be freely configured using jumpers, but as Didier noted the
pinning of those headers is a bit weird. IIRC the DIL pin alternates
between the left and right side of the header and the other pin
alternates between 5V and GND for each row, so you can select GND and 5V
for any DIL pin by setting the jumper either horizontally or

> I suspect that to keep the cost
> down that the PCB might be wider than the .6" DIP but didnít yet
> research if thatís a show stopper.

It's much wider and longer - the board is 33.5 mm x 74.3 mm, the DIL
interface at the bottom appears to be centered. The overall height
including the DIL pins is ~20 mm.


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Received on 2013-09-04 17:00:03

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