Re: FPGA/CPLD different approach

From: didier derny <didier_at_aida.org>
Date: Wed, 04 Sep 2013 14:46:23 +0200
Message-ID: <52272B9F.9010600@aida.org>
Hi,

the GODIL is thick probably too thick, but you can get one without the 
connector on the top installed
it is easy to place 2 jumpers (small wires) under the board to connect 
GND and VCC
(I only use the connectors on the top to connect a logic analyzer)

btw:  the 48 pin version is not really sold by trenz,  I got mine 
directly from OHO,
           he sent me 2 samples (without the connectors installed) and a 
full set of connectors.

           my main problems with the GODIL was the power consumption, 
far above
           the original circuit, (I was playing with the 6532 and micro kim)

--
didier


On 04/09/2013 14:25, Istvan Hegedus wrote:
> Hi,
> I would say if the PCB is slightly larger than the original DIP that 
> is not a problem although e.g. in case of the plus 4 you could not use 
> that for TED replacement due to the space in the shield. For me the 
> inside is much more important, to have as accurate emulation as possible.
> The emulation could be used to build a whole system in FPGA (like FPGA64).
> Hege
> *From:* Bil Herd <mailto:bherd@mercury-cg.com>
> *Sent:* Tuesday, September 03, 2013 3:15 PM
> *To:* cbm-hackers@musoftware.de <mailto:cbm-hackers@musoftware.de>
> *Subject:* RE: FPGA/CPLD different approach
>
> I did a quick fitting on some opencores and found that the PIOís and 
> support chips probably fir in the CPLDís and that the processors 
> probably didnít.
>
> I have a question for anyone that is interested in using FPGA/CPLD 
> emulated parts: How important is it that the PCB of a drop in 
> replacement stay strictly in the foot print of a 40/48 pin chip or is 
> the PCB okay to be wider than .6Ē once its .3-.4Ē above the socket 
> itís inserted into?
>
> Bil
>
> *From:*owner-cbm-hackers@musoftware.de 
> <mailto:owner-cbm-hackers@musoftware.de> 
> [mailto:owner-cbm-hackers@musoftware.de 
> <mailto:owner-cbm-hackers@musoftware.de>] *On Behalf Of *Ed Spittles
> *Sent:* Tuesday, August 27, 2013 4:13 PM
> *To:* cbm-hackers@musoftware.de <mailto:cbm-hackers@musoftware.de>
> *Subject:* Re: FPGA/CPLD different approach
>
> For some purposes OHO's GOP board might be a better fit than the GODIL 
> - it's smaller, got fewer pins, but has a 512kByte SRAM on board..
>
> http://www.trenz-electronic.de/products/fpga-boards/oho-elektronik.html
>
> http://shop.trenz-electronic.de/catalog/default.php?cPath=1_48_137
>
> (For simple designs there are CPLD variations, but as noted that's not 
> big enough for a 6502-like CPU, or for ROM or RAM.)
>
> As noted elsewhere, these boards have 5V level converters, crystals, 
> and on-board EEPROM for configuration.
>
> Cheers
>
> Ed
>
> On 27 August 2013 11:34, Ingo Korb <ml@akana.de <mailto:ml@akana.de>> 
> wrote:
>
> Bil Herd <bherd@mercury-cg.com <mailto:bherd@mercury-cg.com>> writes:
>
> > I have gone through some test fitting but haven't really checked out
> > GODIL, for instance can they program the VCC and Ground pins or do
> > they have to physically configure?
>
> They can be freely configured using jumpers, but as Didier noted the
> pinning of those headers is a bit weird. IIRC the DIL pin alternates
> between the left and right side of the header and the other pin
> alternates between 5V and GND for each row, so you can select GND and 5V
> for any DIL pin by setting the jumper either horizontally or
> vertically.
>
>
> > I suspect that to keep the cost
> > down that the PCB might be wider than the .6" DIP but didnít yet
> > research if thatís a show stopper.
>
> It's much wider and longer - the board is 33.5 mm x 74.3 mm, the DIL
> interface at the bottom appears to be centered. The overall height
> including the DIL pins is ~20 mm.
>
> -ik
>
>
>        Message was sent through the cbm-hackers mailing list
>



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Received on 2013-09-04 13:01:11

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