Hi All, Replacement parts will not lasts forever on ebay, and some components have already almost totally disappeared. So I think that if we don’t replace old parts by fpga everyday, I think it is important to know the techniques and problems associated to this replacement… I think it would be also be fine to have a library of code to replace the components. When I started to rebuild the 6532, I thought it would be relatively easy but in fact I had many problems After the problems of power supply it was problems of timings and glitches generated by the address decoding of the micro kim. I have been able to rebuild several things in the 6532 but not enough to replace the main 6532. I have had to stop by lack of time, I’ll restart a little bit later (I’ll tell you, and I’ll make the source available) For me the pleasure of having an old commodore (even repaired with a fpga) is not the same than an emulator Either by pure software or by a fpga. The micro kim running with a GODIL plugged in place of the second 6532 http:// http://netfilters.eu/microkim/IMAG0243.jpg http:// http://netfilters.eu/microkim/IMAG0244.jpg I was running some tests, the GODIL implements: some ram, some rom (for a future 6530) And one parallel port (debug on the logic analyser) The timer is not working correctly (counting but badly) -- didier De : firstname.lastname@example.org [mailto:email@example.com] De la part de Bil Herd Envoyé : mercredi 4 septembre 2013 18:51 À : firstname.lastname@example.org Objet : RE: FPGA/CPLD different approach I hadn’t thought about power consumption (yet) as I guess I hadn’t really come to terms with the fact that something useful for someone restoring old systems would really need the (exact) same footprint (TED) and reasonable power, etc. I was hung up all the way back at cost as I don’t know what is considered to be too expensive, but I know what I consider to be too expensive and the different scenarios seemed kind of costly. Also I tend to think about its use to an engineer or for experimentation out of habit. I assume that $100USD is completely out of line for a chip emulator just to pick a price, I assume it’s cheaper to find a system on Ebay, etc, but then are there chips that just can’t be gotten any more? Are there systems that are irrevocably unusable without some chips of the category we are talking about? Bil From: email@example.com [mailto:firstname.lastname@example.org] On Behalf Of didier derny Sent: Wednesday, September 04, 2013 8:46 AM To: email@example.com Subject: Re: FPGA/CPLD different approach Hi, the GODIL is thick probably too thick, but you can get one without the connector on the top installed it is easy to place 2 jumpers (small wires) under the board to connect GND and VCC (I only use the connectors on the top to connect a logic analyzer) btw: the 48 pin version is not really sold by trenz, I got mine directly from OHO, he sent me 2 samples (without the connectors installed) and a full set of connectors. my main problems with the GODIL was the power consumption, far above the original circuit, (I was playing with the 6532 and micro kim) -- didier On 04/09/2013 14:25, Istvan Hegedus wrote: Hi, I would say if the PCB is slightly larger than the original DIP that is not a problem although e.g. in case of the plus 4 you could not use that for TED replacement due to the space in the shield. For me the inside is much more important, to have as accurate emulation as possible. The emulation could be used to build a whole system in FPGA (like FPGA64). Hege From: Bil Herd <mailto:firstname.lastname@example.org> Sent: Tuesday, September 03, 2013 3:15 PM To: email@example.com Subject: RE: FPGA/CPLD different approach I did a quick fitting on some opencores and found that the PIO’s and support chips probably fir in the CPLD’s and that the processors probably didn’t. I have a question for anyone that is interested in using FPGA/CPLD emulated parts: How important is it that the PCB of a drop in replacement stay strictly in the foot print of a 40/48 pin chip or is the PCB okay to be wider than .6” once its .3-.4” above the socket it’s inserted into? Bil From: firstname.lastname@example.org [mailto:email@example.com] On Behalf Of Ed Spittles Sent: Tuesday, August 27, 2013 4:13 PM To: firstname.lastname@example.org Subject: Re: FPGA/CPLD different approach For some purposes OHO's GOP board might be a better fit than the GODIL - it's smaller, got fewer pins, but has a 512kByte SRAM on board.. http://www.trenz-electronic.de/products/fpga-boards/oho-elektronik.html http://shop.trenz-electronic.de/catalog/default.php?cPath=1_48_137 (For simple designs there are CPLD variations, but as noted that's not big enough for a 6502-like CPU, or for ROM or RAM.) As noted elsewhere, these boards have 5V level converters, crystals, and on-board EEPROM for configuration. Cheers Ed On 27 August 2013 11:34, Ingo Korb <email@example.com> wrote: Bil Herd <firstname.lastname@example.org> writes: > I have gone through some test fitting but haven't really checked out > GODIL, for instance can they program the VCC and Ground pins or do > they have to physically configure? They can be freely configured using jumpers, but as Didier noted the pinning of those headers is a bit weird. IIRC the DIL pin alternates between the left and right side of the header and the other pin alternates between 5V and GND for each row, so you can select GND and 5V for any DIL pin by setting the jumper either horizontally or vertically. > I suspect that to keep the cost > down that the PCB might be wider than the .6" DIP but didn’t yet > research if that’s a show stopper. It's much wider and longer - the board is 33.5 mm x 74.3 mm, the DIL interface at the bottom appears to be centered. The overall height including the DIL pins is ~20 mm. -ik Message was sent through the cbm-hackers mailing list Message was sent through the cbm-hackers mailing listReceived on 2013-09-04 20:00:03
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