Re: FPGA/CPLD different approach

From: Mark McDougall <>
Date: Mon, 26 Aug 2013 12:46:39 -0400
Message-ID: <>
FPGA's require external memory to store their configuration, whether you want to emulate ROM or not. The easiest solution is external serial flash and no, you don't need to design the boot process. The other solution is to program from a micro; you need to write some software to do the programming but it's fairly straightforward and chances are you can find someone has done it on that platform before.

Sent from my ASUS Pad wrote:

>On 2013-08-26, at 16:06, Bil Herd wrote:
>> Correct, the Altera line needs an external source to load from
>Meaning if I want to have ROM (among other things) inside an FPGA, I need ROM outside first.. :-0
>Does one need to "design" the boot process or is it some kind of standard already and the chip "knows" where to get its configuration/content from? 
>> (I still call
>> it the font but I am probably wrong).  I have done a design were the FPGA
>> was $1 and the eeprom was $10, which just sucked.
>> Altera CPLD don’t need to be loaded every power cycle.
>> Altera is coming out with flash based devices next year according to the FE
>> for my area.
>> I usually do away with the EEPROM
>Can it be something of small footprint? Like a serial EEPROM?
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Received on 2013-08-26 17:03:57

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