Re: FPGA/CPLD different approach

From: Michał Pleban <>
Date: Mon, 26 Aug 2013 21:15:55 +0200
Message-ID: <>
Hello! wrote:

> Why is it so? I read somewhere in Altera docs that /ROM/ is not available in [their MAX series] CPLDs. Does that mean it is not available in /any/ of them? Sorry if that's a n00b question but I also read somewhere that FPGAs have to be given some external boot rom, while CPLDs don't.

CPLDs are combinatorial devices (AND-OR arrays). You _can_ program such
device as ROM, for sure. But it will be very inefficient. You will get
only few bits of ROM from the whole device.

Most FPGAs are, indeed, programmed from an external configuration ROM
chip on power-on. I heard, however, than Lattice produces instant-on
FPGAs that don't need them.

> Like the "original" Altera MAX I guess?

Yes. ATMEL still produces pin-compatible 5V replacements.

> For what I think of doing I'd need about a dozen of chips. RAM, ROM, I/O and some glue as well. When I counted those, it triggered me to eventually start thinking of putting all of those into one chip, presumably only with some level adapters like on the GODIL and am now trying to learn enough to make somewhat educated decision...

You could reduce it to three chips: RAM, ROM and CPLD with glua and I/O.
Or you could go with a FPGA + configuration ROM (possibly on a GODIL). I
think these are your only options.


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Received on 2013-08-26 20:00:03

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