Re: C64 buses when RESET is asserted

From: Gerrit Heitsch <>
Date: Mon, 08 Apr 2013 23:01:01 +0200
Message-ID: <>
On 04/08/2013 10:44 PM, Groepaz wrote:
> On Monday 08 April 2013, you wrote:
>> That's what I meant. Clearing the "screen disable" bit (bit 4 at SCROLY
>> register) is the soft way to get rid of bad lines, used in many timing
>> critical operations. If this bit is (as I expect) cleared on power-up then
>> at least  the bad lines are not interfering and there would be no need to
>> monitor the extra line.
> its not cleared on reset ....

VIC doesn't have a RESET input pin, meaning it doesn't know that the 
rest of the system just got hit by the big hammer and will blissfully 
continue to display what it was programmed to display until the CPU 
tells it otherwise or the power goes out.

It should be cleared on power up though, otherwise VIC would display 
something (colorful junk). It doesn't, you just get a black screen.


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Received on 2013-04-08 22:00:04

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