Re: C64 buses when RESET is asserted

From: silverdr_at_wfmh.org.pl Date: Mon, 8 Apr 2013 22:23:17 +0200 Message-Id: <E9DB6296-D0C5-4D5B-AEAD-E4BBFE5C0FFF@wfmh.org.pl>

On 2013-04-08, at 21:24, Gerrit Heitsch wrote:

>> If you tristate the cpu, you still have half the cycle left for the
>> write. Not much more difficult.
> 
> You also need to monitor the BA (RDY) line, otherwise you'll run into trouble when the VIC does a badline and uses the complete cycle.

But - generally - if this is done on power-up, then it could possibly be done before VIC gets initialised (I assume - maybe wrong now - that it powers up with "screen disabled" state)?

-- 
SD!
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