Re: C64 buses when RESET is asserted

From: Segher Boessenkool <>
Date: Sat, 13 Apr 2013 21:37:17 +0200
Message-Id: <>
>>> If you tristate the cpu, you still have half the cycle left for the
>>> write. Not much more difficult.
>> You also need to monitor the BA (RDY) line, otherwise you'll run  
>> into trouble when the VIC does a badline and uses the complete cycle.
> But - generally - if this is done on power-up, then it could  
> possibly be done before VIC gets initialised (I assume - maybe  
> wrong now - that it powers up with "screen disabled" state)?

It powers up in a random state.  Most register bits will *usually* be 0.


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Received on 2013-04-13 20:00:03

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