On 04/08/2013 10:23 PM, firstname.lastname@example.org wrote: > > On 2013-04-08, at 21:24, Gerrit Heitsch wrote: > >>> If you tristate the cpu, you still have half the cycle left for the >>> write. Not much more difficult. >> >> You also need to monitor the BA (RDY) line, otherwise you'll run into trouble when the VIC does a badline and uses the complete cycle. > > But - generally - if this is done on power-up, then it could possibly be done before VIC gets initialised (I assume - maybe wrong now - that it powers up with "screen disabled" state)? It will still do its own read cycles even if they're dummy cycles, including the refresh cycles. You might be able to get rid of the badlines though. Gerrit Message was sent through the cbm-hackers mailing listReceived on 2013-04-08 21:00:40
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