Re: 6510 handling of $00 and $01 registers

From: Segher Boessenkool <>
Date: Wed, 7 Dec 2011 20:45:01 +0100
Message-Id: <>
> I am fairly sure that R/W and the address lines will be asserted. I  
> vaguely remember that the data lines are left floating.

That is correct.  We don't have die pictures of a 6510 yet, but
it seems like the 00/01 thing forces the DBE signal low, and
that is all it does (and the actual register stuff of course).

> If this is true, then what is written would be whatever used to be  
> on the bus (on the last VIC-II access), similar to what you read  
> from $de00..$dfff on a stock machine. But, note that some computers  
> are "buggy" in this respect. Does anyone have an explanation for this?

On a C64C this certainly isn't true: you get mostly 1 bits, it
doesn't matter what the VIC is displaying.  There are differences
in bus structure and bus timing between the various models.

> One more tidbit: on the 128, you can programmatically enable  
> UltiMax mode on the MMU (GAME=0, EXROM=1, enter 64 mode) and let  
> the VIC-IIe fetch its data from an unconnected address. In the  
> mid-1990s, I played a bit with this, trying to write a test program  
> that would display the data fetched by the processor. It did not  
> occur to me back then to research whether you can disable memory  
> refresh and corrupt the RAM in this mode.

The row address gets delivered to the RAM no matter what, so there
is no problem there?


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Received on 2011-12-07 20:00:25

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