Re: 6510 handling of $00 and $01 registers

From: Marko Mäkelä <>
Date: Wed, 7 Dec 2011 20:44:24 +0200
Message-ID: <20111207184423.GA3234@x60s>
On Wed, Dec 07, 2011 at 06:28:24PM +0100, wrote:
>If you write to locations $00 and $01 with the 6510 and it's 
>derivatives, does the address and data still get exposed on the addr 
>and data bus?

I used to remember this. You can easily read from 0 and 1 on the C128 by 
mapping the stack page ($100 to $1ff) to the zero page. On the stock 
C64, it takes more effort, but you could move a sprite with one pixel 
set, across graphics that shows what is at 0 and 1, and read the data 
from the sprite collision register.

>Obviously reads are still going to routed internally to the registers 
>but I am trying to determine if writes still get mirrored to ram and 
>therefore whether the CPU is still setting the appropriate control 
>lines for R/W etc.

I am fairly sure that R/W and the address lines will be asserted. I 
vaguely remember that the data lines are left floating. If this is true, 
then what is written would be whatever used to be on the bus (on the 
last VIC-II access), similar to what you read from $de00..$dfff on a 
stock machine. But, note that some computers are "buggy" in this 
respect. Does anyone have an explanation for this?

By the way, this also works with the high-order bits of the colour RAM.  
In 1994 or 1995, I spent a couple of weeks writing a test program "dadb" 
that executes $60 (RTS) most of the time, and changes the border colour 
if a key (space?) is pressed. The stack was filled with $da and most of 
the colour RAM was filled with 0. This program works in VICE, largely 
thanks to Andreas Boose, I guess.

One more tidbit: on the 128, you can programmatically enable UltiMax 
mode on the MMU (GAME=0, EXROM=1, enter 64 mode) and let the VIC-IIe 
fetch its data from an unconnected address. In the mid-1990s, I played a 
bit with this, trying to write a test program that would display the 
data fetched by the processor. It did not occur to me back then to 
research whether you can disable memory refresh and corrupt the RAM in 
this mode.


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Received on 2011-12-07 19:00:08

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