Re: on-chip flags

On 09/03/2011 07:14 PM, Hársfalvi Levente wrote:

> Speaking of sram cells... You can possibly light some clue on a small
> detail that I couldn' have understood so far (...and you couldn't, it
> might still be a warning about what's likely to be seen somewhere in the
> TED).
>
> As you say, the sram cells generally don't lose their content (because,
> as I get it, they're built up like a classic, bistable sram cell, ie.
> from two inverters).
>
> One would suppose, flags must be implemented in a similar fashion ( some
> bistable).

Not necessarily. The sram that holds character pointer and attribute 
data has to stay stable for a long time (8 character rows, much longer 
if the RAM was filled at the end of the last character row) before it 
gets overwritten.

Certain flags that, if everything works according to spec, are 
constantly refreshed, don't need an SRAM cell. They can be implemented 
like the registers in the NMOS 6502 which also loses data if clocked to 
slow.

  Gerrit


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