Re: C64/VIC Bus state during RESET

From: Jim Brain (
Date: 2008-11-07 06:43:29

Bil Herd wrote:
> As we found on the C128, a VIC is like a dump truck on the loose and it
> don't stop for no blinking reset line. I had to laugh a few months back
> when I pulled out the schematics for a c128D and saw that we conditioned
> the reset line a little so the VIC wouldn't go clobbering the first
> couple of cycles in a Z80 (before the Z starts paying attention to the
> AEC)
I decided to just punt and buffer all of the lines, since the VIC might 
not be the only instance where the bus is "dirty" and cannot be trusted.

Here's a shot of what I am working on:

It's a small board that houses a 32KB RAM that takes the place of a 
JEDEC 28 pin ROM/EPROM.  It fits in the same space as a 28 pin EPROM.  
On powerup, an onboard uC will isolate the RAM from the bus, holding the 
target machine in a RESET state, and load an image into the RAM from a 
small 4MB Flash ROM or an SD card.  When finished, the RAM will be 
connected to the bus and the RESET line de-asserted.  The uC is 
connected to the bus as well, and I hope to allow the target machine to 
"communicate" the the unit by sending a specially crafted sequence of 
addresses, which will switch the unit into "program mode", where the 
lower 8 bits of the address lines would be the data patch and the upper 
5 lines would be commands.

It's early in the design, but I wanted to try to lay it out first, as it 
makes little sense to move forward if I couldn't get all of the parts 
into a 28/.600" footprint.  As you can see, I'm still struggling with 
some signals, and it's a first layout for this design.

I have two goals.  A Software ROM that can be loaded with kernals of 
your choice, and a cart ROM emulator, which would allow one to select a 
game from an SD card, and then the unit would reset and the game would 
be ready to play.

Maybe it's wishful thinking, dunno.  But, it looks like a neat 
challenge, and I have all of the SD/FAT code available from sd2iec.


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