From: Hatch (hatch_at_in.com.au)
Date: 2005-02-04 03:39:09
Thanks Ruud.
> IMHO delaying that signal leads to trouble. But it worked out well for you.
> My thoughts: during the ocasions things went wrong, it was the read that was
> faulty, not the write. Could be checked by doing another read.
It was definitely the writes that were wrong, at this point all I'm doing is writing to the video ccts RAM, I haven't even interfaced the 6510 to read from it yet, there's not really any point until I increase the RAM to a more decent size (/OE is held high whenever the 6510 addresses the video cct's RAM).
> There aren't many designs because there was no need. The C64 already is
> equiped with the maximum it can address. Anyway I made several designs using
> SRAM. An 'easy' design is an EPROM-emulator: SRAM mimics EPROM in the
> $8000/$BFFF range. $DFxx is used as write window and some registers in $DExx
> set the right page. I did a bit of decoding with as main goal to use as less
> as IC's as possible (in 1989 I didn't worry about access- and delay-times).
> Worked fine, no problems at all.
Any chance that you can remember what control lines you were using for /CS or /WR ?
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