From: Baltissen, GJPAA (Ruud) (ruud.baltissen_at_abp.nl)
Date: 2005-02-03 16:22:47
Hallo Hatch,
> maybe that delayed the /CS1 signal enough?
IMHO delaying that signal leads to trouble. But it worked out well for you.
My thoughts: during the ocasions things went wrong, it was the read that was
faulty, not the write. Could be checked by doing another read.
> By the way there where only two examples I could find of a
> 6510 connected to static ram, .....
There aren't many designs because there was no need. The C64 already is
equiped with the maximum it can address. Anyway I made several designs using
SRAM. An 'easy' design is an EPROM-emulator: SRAM mimics EPROM in the
$8000/$BFFF range. $DFxx is used as write window and some registers in $DExx
set the right page. I did a bit of decoding with as main goal to use as less
as IC's as possible (in 1989 I didn't worry about access- and delay-times).
Worked fine, no problems at all.
--
___
/ __|__
/ / |_/ Groetjes, Ruud
\ \__|_\
\___| URL: Ruud.C64.org
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