Re: Need help debugging IEC timing on #FujiNet

From: afachat_at_gmx.de
Date: Thu, 20 Apr 2023 23:22:26 +0200
Message-ID: <13247101.uLZWGnKmhe_at_euler>
Hi there,

On Dienstag, 4. April 2023 18:40:59 CEST Thom Cherryhomes wrote:
> Hello all,
> 
> For those who haven't met me, I'm Thom Cherryhomes, and one of the firmware
> engineers behind FujiNet, as well as being one of the talking heads of the
> project.
> 
> FujiNet is, for those who don't know, an intelligent network adapter built
> around the Espressif ESP32 microcontroller, with bus adaptations currently
> for Atari, Adam, Apple2, and Lynx systems, with more coming, including the
> IEC implementation for Commodore systems with serial ports (yes, we want to
> do an IEEE-488 version too). For IEC and 488, it provides a virtual disk,
> printer, and network adapter that can be controlled via standard KERNAL
> methods.

I'm looking forward to the IEEE488 version :-)
 
> It is a completely open project, in hardware, firmware, and software, and
> anyone can make them, we do not ask for any licensing fees, and I do not
> make any money from the project whatsoever. (Mozzwald does make money from
> selling fujinets to help cover hardware development costs).

Excellent! 

> Thanks to Jaime Johnston's help and code from the Meatloaf project, we have
> been able to do the initial bring-up of the device, enough to start work on
> example programs, but we are having a hell of a time ironing out the bus
> timings. This is where we are asking for help.

While others have chimed in regarding the timing on the Commodore side, I can 
give you working examples of C64 code, including some comments, from my XD2031 
project. 

This file  https://github.com/fachat/XD2031/blob/master/firmware/iec.c uses some 
methods imported from device-specific files (like how to read/set IEC lines), 
but otherwise runs the same way for multiple types of hardware.
(on the other hand, looking at some of the comments, it's still a lot of 
guesswork included...)

> 
> Currently, for example, we can reasonably consistently load and save
> software over our network device, however, consistent switching back and
> forth between LISTEN and TALK is manifesting in bus hangs, both in the
> middle of sending bits, and when handling the turn-around. This does not
> account for the fact that while we can get things to sort of work on the
> 64, we have issues with plus/4, and I haven't been able to try VIC-20, yet.

While all three have timing differences as mentioned in the other mails, 
a) if you send your bits slow enough it should work for all of them
b) receiving should not have much difference as the bit shift is controlled by 
the CBM device

What may makes sense is to look at when certain state changes are performed. 
There may be subtle differences, e.g. the C128 requires a different handling 
than the C64 if I read a comment in my file correctly.

> Specifically, the code that deals with all the IEC transactions, is here:
> https://github.com/FujiNetWIFI/fujinet-platformio/tree/master/lib/bus/iec
> 

Hm, C++ is not in my list of known languages.... (besides its similarity to C)

What it seems to me is that it merges three layers:
a) hardware access (in XD2031 in separate, hardware-specifci files)
b) IEC line protocol (in my iec.c)
c) IEEE488/IEC logical protocol (in XD2031 this is in bus.c)

It may be worthwhile to think about separating them.

One particular thing I did not see is that the bus layer may need to provide 
the same byte multiple times. E.g. it is provided to the IEC layer, but before 
being sent to the CBM, and ATN (e.g. UNTALK) happens. After the next TALK this 
same byte must be provided again. In my XD2031 implementation 
bus_receivebyte() is first called with the PRELOAD flag, and without when the 
byte has been known to be transferred. This could be one issue I am thinking 
of.
 
> What are the timing differences that can cause an absolute nightmare
> between a c64 and a plus4? How does the 1541 deal with them?

What I noted is that different IEEE488 (!)  implementations change different 
handshake lines at different times in the protocol. This IIRC differs e.g. 
between early and later PET, or the Commodore IEEE488 cartridge for the C64.
I am not sure if this is true for the IEC bus as well, but my experience with 
the C128 seems to suggest this.

As an addition to the history of the protocol:
- As a side note: Commodore originally intended to use the VIA shift registers 
for that but did not notice that there was a hardware bug in that register 
(but also did not try to fix the HW bug unfortunately...)
- The VIC20 came out with the 1540 disk drive. When the C64 came out, the 1540 
was too fast due to the VIC-II badlines mentioned in other mails. So the 1541 
was born, that by default runs a bit slower than the 1540 but can be switched 
to the faster protocol.

> -Thom

Hope that helps
André
Received on 2023-04-21 00:00:03

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