Re: Building a 6502 peripheral - timing

From: Mia Magnusson <mia_at_plea.se>
Date: Sat, 17 Mar 2018 00:04:00 +0100
Message-ID: <20180317000400.00006267@plea.se>
Den Fri, 16 Mar 2018 07:50:13 +0100 skrev And Fachat <afachat@gmx.de>:
> Also, with " take the address during phi2 high " is critical like in
> the c64, as the address line may still change at the beginning of the
> cycle. So if you have IO here that e.g. clears the interrupt when
> reading the interrupt register, that may accidentally trigger here.

It seems like that kind of stuff should ideally be triggered by the
falling edge of PHI2.

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Received on 2018-03-17 01:00:23

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