Update on emulating a paddle on the C64.

From: Jim Brain (brain_at_jbrain.com)
Date: 2004-11-20 06:36:53

Well, I'm finally happy with the code that emulates a paddle on the C64 
joystick port. 

The code is written for the Atmel AVR family of microcontrollers, and 
can be embedded into a number of projects. 

The final code runs at 8MHz, sets up a free running 16 bit dual compare 
match counter at clock speed, and the POT line is fed to the Input 
Capture pin on the AVR.  When the POT line is driven low, the ICP 
captures the current counter value.  In the ISR, both POT lines are 
driven low.  For each POT register, 4096 + 8*<register value> is added 
to the captured counter value, and an interrupt is set to occur when a 
match occurs.  Then, the counter value is subtracted from the last 
captured counter value.  The result is made positive, and it is checked 
for sanity.  Assuming the number is < 7000, it is checked for equality 
with 4096.  If  lower, the onboard oscillator is sped up by adding 1 to 
oscillator calibration register, if more, the internal oscillator is 
slowed down.  The current captured counter value is saved, and the ISR 
ends.  When the compare matches are made, each ISR brings the respective 
POT pin high, and then checks if they other match has occured and brings 
the other line high if so.

Features:

o Can represent values from 4-255 on POT lines.
o Jitter of +1 only at endpoints (4 and 255), and when both POT lines 
are at the same value (127,127, for example)
o Values are dead on over the entire range.  If the controller sends 
$a7, $a7 shows up on C64
o Code synchronizes to speed of target computer.  As a result, code 
should sync for PAL 64s as well as the 264 series, though I still need 
to test that.
o Code is entirely in ISR, so normal task can run during the process.  
Another ISR of less than ~200*8 cycles can be performed during the 
discharge portion of the POT cycle. 
o Minimum parts count (1 resistor for RESET, 1 3.3K resistor per POT 
line, and CPU).
o Code will run on any ATMega part.
o ISR takes 64cycles to run and occurs every 4096 cycles.

I started to write more complex code to handle the scenario when both 
POT lines are at the same value, but the code became too unwieldy, and 
then the compare match ISR routines started taking too long.

As soon as World of Commodore is over, which is where I'll demo my 
project, I'll make the code available online.  It's GPL, and it should 
be easy to build a PS/2 mouse interface, or some other idea.  It looks 
like (if PAL testing proves out my theory) one could use the POT lines 
for 7 bit data transfer at least, or send any values except numbers < 8 
or so. 

Many thanks to the list for the ideas.

Jim

-- 
Jim Brain, Brain Innovations
brain@jbrain.com                                http://www.jbrain.com
Dabbling in WWW, Embedded Systems, Old CBM computers, and Good Times!


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