From: Jim Brain (brain_at_jbrain.com)
Date: 2004-11-01 05:04:24
Hársfalvi Levente wrote: > A pretty late reply... No worries. >> I noticed that you can adjust the reading by either the timing OR the >> resistance, so they probably set the 256+X*2 in the ASIC, and then >> fiddled >> with the resistor to get the start and end they wanted. The resistance >> changes would cancel out the accumulating effect of the mismatch, by >> sliding the effective numbers up or down accordingly. > > > Hmmm... I've played with this one, and in fact, they did not. The asic > waits 384 + x*2 ( 0 <= x <= 63) cycles. Although I had (and I have) no > 1351, Frank Kontros was kind to make measurements on a partially > working 1351 he owned. The values that you can read from the POT > registers are between ~64 and ~192 (approximately) on a PAL machine. > You're right, the delay caused by the series resistor, and the gain > caused by the clock difference approximately cancel each other. ...On > the other hand, this isn't true for NTSC machines. These machines > count faster than the 1351, thus the errors will be of the same sign, > thus they add together. What I meant is that If I keep the timing constant and adjust the resistor, I can move the reading up or down as I see fit. FOr instance, in one of my tests, I hardcoded the MCU to generate a 127 reading (256 cycles low, 127 low, 128 high, repeat). I then start adjusting the resistors while watching the POT readings on the 64. I could swing the reading on the 64 from 112 to 137, and I could have moved more, but that was not the focus of this test. So, it shows me that I can setup the timing, then adjust the resistance if the error margin is too much. > How could the 1351 still work as intended?... Well, if you drop the > read value's MSB, the values between 64 and 192 (or whatever they are > around 64 and 192) will map to somewhere between 64...127 and 0...63 > respectively, with a "wrap-around" at the middle. The trick is: the > values transmitted by the 1351 are "cyclic". It's kind of irrelevant > if the internal counter of the 1351 start from 0 and count up to 64, > then wrap around, whilst the values in the POT registers count from 64 > to 127, wrap around, and continue counting from 0 to 63. True, but I'm not trying to emulate the mouse, but a real paddle, so I need my 0-255, and I need it to be reasonable stable over the entire range. > An AVR clocked at 8Mhz should be suitable for jitterless operation if > I'm right... It is, if that is ALL you are doing, or if you can accomplish what you need in the 256 "wait" cycles, but that's not always possible. > What's this equipment anyway, and what interface is this? It's just some ideas I'm working on here. The idea is to create a chunk of HW with a MCU that can plug into the joyport, and have lots of IO options. Then, folks can program the HW "dongle" with different programs to be different interfaces: Emulating 1351 using: PS/2 mouse Serial mouse touchpad Emulating 64 joystick/paddles using: PC gamepad console gamepad RS232 from another computer who knows. The idea would be to layout the PCB and put a suitable MCU on it and make it small enough to fit in a DB9 shell. Then, people only have to learn to program the MCU, the bulk of the HW work is done. Jim -- Jim Brain, Brain Innovations firstname.lastname@example.org http://www.jbrain.com Dabbling in WWW, Embedded Systems, Old CBM computers, and Good Times! Message was sent through the cbm-hackers mailing list
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