From: Jim Brain (brain_at_jbrain.com)
Date: 2004-05-19 04:00:05
Marko Mäkelä wrote:
>On Wed, May 12, 2004 at 11:53:18PM -0500, Jim Brain wrote:
>
>
>>The question is how many pins should I monitor via an interrupt?
>>
>>
>
>My code is monitoring ATN and the rising edge of CLK when receiving data.
>Each incoming bit generates an interrupt. Sending is much simpler, as
>it can be implemented in a single routine looping over bits and bytes.
>I haven't looked at burst transfers.
>
> Marko
>
> Message was sent through the cbm-hackers mailing list
>
>
Do you have a state diagram you made to show the state machine?
I have the ATN IRQ working, and the CLK is working. I am planning to use
the built-in SPI port to read the actual bits (It won't work for output,
but it looks to be fine for input...)
I checked on funet, but it doesn;t look like the IEC code additions are
on the site (I could be looking in the wrong place). I was wondering if
you did a timer IRQ and a CLK IRQ for the EOI handshake as well, or just
the initial CLK HI... I had thought about using the timer IRQ to
generate the 255 uS wait for the EOI handshake, but it made the code
quite a bit more complicated.
Jim
--
Jim Brain, Brain Innovations
brain@jbrain.com http://www.jbrain.com
Dabbling in WWW, Embedded Systems, Old CBM computers, and Good Times!
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